RISC-V Tomasulo CPU Simulator
An out-of-order RISC-V simulator that makes the data flow inside a Tomasulo-style processor visible.
TOWNS · ZHEYU TANG
I study computer science at Shanghai Jiao Tong University and try to understand the world through reading.
Building my life through reading, fitness, basketball and meditation
01 / ABOUT
I am Zheyu Tang—Towns to my friends—an ACM Honors Class student at Shanghai Jiao Tong University. I am especially curious about computer architecture and networks, while staying open about where that curiosity may lead.
Beyond technology, my days are shaped by basketball, strength training, books, podcasts, and mindfulness. I hope to do work that matters without losing touch with the people and moments that make a life.
More about me02 / PROJECTS
Coursework and independent implementations across computer architecture, networking, data structures, and language tools.
An out-of-order RISC-V simulator that makes the data flow inside a Tomasulo-style processor visible.
A networking project for understanding layers, state, and failure through real data transfer rather than diagrams alone.
A command-line railway ticket system covering accounts, trains, orders, queues, and persistent state.
03 / READING
12 BOOKS
I care less about the count than how a book enters action, changes a judgment, and returns with new meaning in another season.
Enter the garden一行禅师 · Reading
郑雅君 · Finished
阿诺德·贝内特 · Finished